sgdk
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00001 00010 #include "config.h" 00011 #include "types.h" 00012 00013 #ifndef _DMA_H_ 00014 #define _DMA_H_ 00015 00016 00021 #define DMA_VRAM 0 00022 00026 #define DMA_CRAM 1 00027 00031 #define DMA_VSRAM 2 00032 00033 #define DMA_QUEUE_SIZE_DEFAULT 80 00034 #define DMA_QUEUE_SIZE_MIN 32 00035 00036 #define DMA_TRANSFER_CAPACITY_NTSC 7200 00037 #define DMA_TRANSFER_CAPACITY_PAL_LOW 8000 00038 #define DMA_TRANSFER_CAPACITY_PAL_MAX 15000 00039 00040 #define DMA_BUFFER_SIZE_NTSC DMA_TRANSFER_CAPACITY_NTSC 00041 #define DMA_BUFFER_SIZE_PAL_LOW DMA_TRANSFER_CAPACITY_PAL_LOW 00042 #define DMA_BUFFER_SIZE_PAL_MAX (14 * 1024) 00043 #define DMA_BUFFER_SIZE_MIN (2 * 1024) 00044 00045 00050 typedef enum 00051 { 00052 CPU = 0, 00053 DMA = 1, 00054 DMA_QUEUE = 2, 00055 DMA_QUEUE_COPY = 3 00056 } TransferMethod; 00057 00058 00063 typedef struct 00064 { 00065 u16 regLenL; // (newLen & 0xFF) | 0x9300; 00066 u16 regLenH; // ((newLen >> 8) & 0xFF) | 0x9400; 00067 u32 regAddrMStep; // (((addr << 7) & 0xFF0000) | 0x96008F00) + step; 00068 u32 regAddrHAddrL; // ((addr >> 1) & 0x7F00FF) | 0x97009500; 00069 u32 regCtrlWrite; // GFX_DMA_VRAMCOPY_ADDR(to) 00070 } DMAOpInfo; 00071 00072 00077 extern DMAOpInfo *dmaQueues; 00082 extern u16* dmaDataBuffer; 00083 00093 void DMA_init(); 00113 void DMA_initEx(u16 size, u16 capacity, u16 bufferSize); 00114 00123 u16 DMA_getAutoFlush(); 00132 void DMA_setAutoFlush(bool value); 00139 u16 DMA_getMaxQueueSize(); 00151 void DMA_setMaxQueueSize(u16 value); 00159 void DMA_setMaxQueueSizeToDefault(); 00167 u16 DMA_getMaxTransferSize(); 00180 void DMA_setMaxTransferSize(u16 value); 00187 void DMA_setMaxTransferSizeToDefault(); 00195 u16 DMA_getBufferSize(); 00209 void DMA_setBufferSize(u16 value); 00216 void DMA_setBufferSizeToDefault(); 00223 u16 DMA_getIgnoreOverCapacity(); 00234 void DMA_setIgnoreOverCapacity(bool value); 00235 00241 void DMA_clearQueue(); 00254 void DMA_flushQueue(); 00255 00260 u16 DMA_getQueueSize(); 00267 u16 DMA_getQueueTransferSize(); 00268 00282 void* DMA_allocateTemp(u16 len); 00292 void DMA_releaseTemp(u16 len); 00293 00325 bool DMA_transfer(TransferMethod tm, u8 location, void* from, u16 to, u16 len, u16 step); 00326 00344 bool DMA_canQueue(u8 location, u16 len); 00372 void* DMA_allocateAndQueueDma(u8 location, u16 to, u16 len, u16 step); 00399 bool DMA_copyAndQueueDma(u8 location, void* from, u16 to, u16 len, u16 step); 00425 bool DMA_queueDma(u8 location, void* from, u16 to, u16 len, u16 step); 00431 bool DMA_queueDmaFast(u8 location, void* from, u16 to, u16 len, u16 step); 00432 00455 void DMA_doDma(u8 location, void* from, u16 to, u16 len, s16 step); 00461 void DMA_doDmaFast(u8 location, void* from, u16 to, u16 len, s16 step); 00462 00484 void DMA_doCPUCopy(u8 location, void* from, u16 to, u16 len, s16 step); 00500 void DMA_doCPUCopyDirect(u32 cmd, void* from, u16 len, s16 step); 00501 00517 void DMA_doVRamFill(u16 to, u16 len, u8 value, s16 step); 00532 void DMA_doVRamCopy(u16 from, u16 to, u16 len, s16 step); 00533 00538 void DMA_waitCompletion(); 00539 00540 00541 #endif // _DMA_H_